1. Field of the Invention
The present invention relates to a photo-mask used for fabricating a semiconductor integrated circuit and to a method of fabricating the same.
2. Description of the Related Art
The fabricating of a semiconductor integrated circuit includes a photolithography process of transcribing the image of a circuit pattern from a photo-mask to a photoresist (PR) layer on a wafer. The wafer photoresist pattern (WPR pattern) formed by the photolithography, process is used as a mask for etching material lying under the WPR pattern. On the one hand, the line width of the WPR pattern is the technical variable that most determines the degree to which the final semiconductor circuit is integrated. On the other hand, the degree of integration of the circuit is a main technical factor affecting the value of the semiconductor product. Therefore, various research is aimed at minimizing the line width of the WPR pattern.
Moreover, the uniformity of the line width of the WPR pattern significantly affects the product yield; therefore, reducing the line width of the WPR without maintaining uniformity in the line width has no advantages. Accordingly, various techniques have been suggested for improving the uniformity of the line width of the WPR pattern, such as techniques aimed at controlling conditions of the photolithography process.
FIG. 1 is a flowchart illustrating typical processes in the fabricating of a photo-mask. Referring to FIG. 1, a circuit pattern of a semiconductor product is designed using a computer program (such as a CAD or OPUS program). The design of the circuit pattern is stored in a predetermined memory as electronic data D1. Then, an exposure process (S2) is performed in which an electronic beam or a laser irradiates predetermined regions of a photoresist film extending over a chrome layer on a quartz substrate. The regions irradiated in the exposure process (S2) are determined by exposure data D8 extracted from the design data. The exposed photoresist film is then developed (S3). The development process (S3) removes select portions of the photoresist film, such as those which were irradiated, to thereby form a photoresist pattern. The photoresist pattern exposes the underlying chrome film. The exposed chrome film is then plasma dry-etched using the photoresist pattern as a mask to form a main mask pattern that corresponds to the circuit pattern and, in turn, exposes the quartz substrate (S40).
FIGS. 2A and 2B are a plan view and a sectional view, respectively, of a photo-mask from which the photoresist pattern has been removed. The photo-mask 10 includes a main region 20 typically defined at the center of the photo-mask, and an auxiliary region 30 extending around the main region. The main mask pattern to be transcribed to the wafer, and corresponding to a circuit pattern to be formed on the wafer, is located in the main region 20. An auxiliary pattern, such as an alignment key for aligning the photo-mask in the exposure apparatus, is located in the auxiliary region 30.
The main mask (chrome) pattern may have different line widths due to a fogging effect or a loading effect caused by differences in the density of the photoresist pattern at various regions of the photo-mask (hereinafter referred to as differences in density “in accordance with position”). An experiment performed to uncover the influences that the pattern density of the photoresist has on the line width of the underlying pattern revealed that the fogging effect and the loading effect cause fluctuations in the line width of the underlying pattern by factors of 4.4% and 2.9%, respectively.
It is not possible to remove the root cause of the fogging and loading effects because such effects are physical phenomena caused by differences in the pattern density. It is only possible to minimize the effects by reducing the differences in the pattern density. The method commonly used for reducing the differences in the pattern density entails forming around the main region 20 a density correcting pattern 40 (FIGS. 3A and 3B) having the same pattern density as the pattern density of the main region 20. Although the density correcting pattern 40 makes it possible to effectively prevent the fogging and loading effects from manifesting themselves in the process of forming the main mask pattern, if the density correcting pattern 40 were transcribed to the WPR film, the resulting products would be severely defective.
U.S. Pat. No. 6,566,017 (Chen et al.) discloses a technique of forming an opaque layer on the photo-mask to prevent the density correcting pattern from being transcribed to a wafer. That is, as illustrated in FIG. 1, a deposition process (S5) in which the photo-mask is covered with an opaque layer 50 (FIGS. 4A and 4B) is performed after the etching process (S4). Then, the opaque film 50 is patterned (S6) to form an exposure blocking pattern 55 (FIGS. 5A and 5B) having apertures that expose the main region 20 and the auxiliary region 30, while the density correcting pattern 40 remains covered. The positions of the apertures are determined by extracting opening region data D9 from the design data D1. The photo-mask in which the exposure blocking pattern 55 is formed is delivered (S7) to a customer after undergoing some additional processes.
On the one hand, the exposure blocking pattern 55 prevents the density correcting pattern 40 from being transcribed to the WPR film. However, the additional deposition and patterning processes required to form the exposure blocking pattern 55 increase the cost of fabricating the photo-mask.